Hardwired control versus
Microprogrammed control.

There is no intrinsic difference:

Hardwired control is a control mechanism that generats control signals by using appropriate finite state machine(FSM). Microprogrammed control is a control mechanism that generats control signals by reading the memory called control storage(CS) that contains the control signals. Although microprogrammed control seems to be advantageous to implement CISC machines, since CISC requires systematic development of sophisticated control signals, there is no intrinsic difference between these 2 types of the control.

The pair of "microinstruction-register" and "control storage address register" can be regarded as a "state register" for the hardwired control. Note that the control storage can be regarded as a combinational logic circuit. We can assign any 0,1 values to each output corresponding to each address, that can be regarded as the input for a combinational logic circuit. This is a truth table.

CISC also can be implemented by using hardwired control:

In the above sense, the microprogrammed control is not always necessary to implement CISC machines. Hardwired control also can be used for implementing sophisticated CISC machines. The bases of this opinion are as follows:

  1. The same field configuration (state assignment) can be used for both of these two types of control. This is clear because of the above identification.

  2. We can use any large FSM, that has horizontal microcode like state assignment, since the delay for the hardwired control logic does not matter at all so long as it is less than or equal to the delay for the data-path that includes adders, shifters and so on, since the control logic circuit works in parallel with the data-path.

  3. The horizontal microcode like state assignment has become very easy to be implemented because of the spread of the hardware description language(HDL)s. In Verilog HDL, `define statements enable us to get perfect net-list for the large FSM in a very short time by using appropriate logic synthesizer. The "parameter" statement also can be used for the state assignment in Verilog HDL.
CISC and RISC are the major two different types of ordinary SISD machines. Since the hardwired control have been historically faster, both of these two types of machines are implemented by using the hardwired control in our microcomputer design educational environment known as the City-1.

In 1996, that was the first year of the City-1, an example description named CISC-1, that used a horizontal microcode like state assignment for the FSM in the control unit to implement a CISC machine, had been given to all of the junior students in Hiroshima City University. They succeeded.

Download CISC-1 description in Verilog HDL at the page entitled
system development and design using Verilog HDL.

We decided to call the digital system with a control unit which generates horizontal microcode by using the FSM "hardwired microcode machine(HM^2)".


Related publications:

  1. Ryuichi TAKAHASHI: "System Development and Design Using Verilog HDL" Kyoritu-pub.(2008)ISBN978-4-320-12222-2...in Japanese

    ...HM^2 is clearly described in this book.

  2. Ryuichi TAKAHASHI, Kenta KANDA, Yuji KIHARA, Hajime OHIWA: "CS Education for High School Students Focusing on Energy Consumption on FPGA," Supplementary Proc. ICCE2007:15th International Conference on Computers in Education pp.39-40 (2007)

    ...We called the machine "hardwired microcode machine(HM^2)" in this paper for the first time. HM^2 contains the control unit which generates the horizontal microcode by using the FSM.

  3. Ryuichi TAKAHASHI and Noriyoshi YOSHIDA: "Diagonal Examples for Design Space Exploration in an Educational Environment CITY-1"...ACM, IEEE
    IEEE Proc. MSE 1999: International Conference on Microelectronic Systems Education, pp.71-73 (1999)

    ...The second English paper introducing the horizontal microcode like state assignment for the control unit.

  4. Ryuichi TAKAHASHI and Takeshi YOSHIMURA: "Strategies for High Level Synthesis" The Trans. of the IEICE, VolJ74-A, No.2, pp.143-151 (1991)...in Japanese

    ...The above idea is clearly described in this paper.

  5. Ryuichi TAKAHASHI, Takeshi YOSHIMURA and Satoshi GOTO: "A VLSI Architecture Evaluation System," ACM, IEEE Proc. ICCD 1986 :International Conference on Computer Design, pp.60-63 (1986)

    ...This is the first paper, which illustrates the above identification, where the idea had been used for a quick quantitative evaluation of hardware resources. Although I had been working for NEC Corp., I didn't write any patent on the above idea. Hardwired microcode machine is free to use.

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